Recently, a thin-film transistor having semiconductor films, such as films of non-crystalline silicon, polycrystalline silicon or CdSe, is used as a switching element for a liquid crystal cell of the active matrix liquid crystal display apparatus. FIGS. 4 to 6 show, step-by-step, a production process for a conventional liquid crystal display device of this type (first conventional example) as proposed in JP Patent Kokai JP-A-3-49237 (1991). In each of these figures, (a) and (b) show plan views and cross-sectional views taken along line A--A, respectively. First, a transparent electrically conductive film 8 of, for example, indium tin oxide (ITO), is formed by sputtering on an insulating substrate 1, and patterned by a photolithographic process and wet or dry etching, to form a drain electrode 81, a drain bus line 82 connected to the drain electrode 81, a source electrode 83 and a pixel electrode 84 connected to the source electrode 83, as shown in FIG. 4.
Then, current is allowed to flow through the drain electrode 81 and the drain bus line 82 on the insulating substrate 1 formed in the above step to form a low-resistance plating layer 3' by electrical nickel plating. Then, a semiconductor film 4 of, for example, amorphous silicon (a-Si) and an insulating film 5 of, for example, silicon nitride (SiN) are formed by the plasma CVD method on the insulating substrate 1, as shown in FIG. 6. A low-resistance metal film 6 of chromium (Cr) is formed thereon by sputtering. The resulting assembly is patterned by a photolithographic process and wet or dry etching, to form a gate electrode 61, a gate bus line 62 connected to the gate electrode 61 and an island 41 formed by the semiconductor film 4 coextensive as the gate 61 and the gate bus line 62.
Since the first conventional example is of the longitudinal electrical field type in which an electrical field is applied in a direction perpendicular to the planar direction of the substrate, it is necessary to form a counter electrode entirely facing the pixel electrode 84 on the entire surface of the counter substrate, not shown in the drawing, arranged at a preset separation distance from the insulating substrate 1. Thus, the drain electrode 81 and the gate electrode 61 are necessarily facing the counter electrode, so that a parasitic capacitance is inevitably produced between the drain electrode 81, source electrode 83 and the counter electrode. This parasitic capacitance significantly affects the power consumption such that the electric power for charging/discharging the capacitance across the pixel electrode and the counter electrode amounts to tens to hundreds of the power required for actual display. Also, since the drain bus line 82 and the pixel electrode 84 are formed simultaneously, the drain bus line 82 needs to be formed by a transparent electrically conductive film having a high resistance, while a plating film 3' needs to be formed by a process such as metal plating for lowering the wiring resistance, thus complicating the production process and the structure.
On the other hand, FIGS. 7 to 10 show, step-by-step, a production process for a transverse electrical field type active matrix liquid crystal display apparatus, employing a thin-film transistor as a switching element (second conventional example), as proposed in JP Patent Kokai JP-A-63-21907 (1988). In each of these figures, (a) and (b) are plan views and cross-sectional views taken along line AA, respectively. First, as shown in FIG. 7, a transparent insulating substrate 2 is formed on an insulating substrate 1 a low resistance metal film 3 of, for example, Cr, is formed thereon by sputtering. The resulting assembly is patterned by a photolithographic process and wet or dry etching to form a drain electrode 31, a drain bus line 32 connected to the drain electrode 31, a source electrode 33 and a pixel electrode 34 connected to the source electrode 33. Then, as shown in FIG. 8, a n-type semiconductor layer 7 of, for example, n.sup.+ a-Si, is formed by the plasma CVD method on the insulating substrate 1. The resulting assembly is patterned by the photolithographic process and wet or dry etching to form an ohmic contact area 7a on the drain electrode 31 and on the source electrode 33.
Then, a semiconductor film 4 of, for example, a-Si, is formed by a plasma CVD method on the insulating substrate and is patterned by the photolithographic process and wet or dry etching to form an island 41. Then, as shown in FIG. 10, a transparent insulating film 5 is formed by depositing SiN on the insulating substrate 1 by the CVD method and a low-resistance metal film 6 of Cr is formed by sputtering. This low-resistance metal film 6 is patterned by the photolithographic process and wet or dry etching to form the gate electrode 61, gate bus line 62 connected to the gate electrode 61, and the counter electrode 63.
Since this second conventional example is of the transverse electric field system, in which the pixel electrode 34 and the counter electrode 63 are formed on the sole insulating substrate 1, it is possible to drastically reduce the parasitic capacitance across the drain electrode 31 and the gate electrode 61 and the counter electrode 63 in a manner more meritorious than with the first conventional example described above. Moreover, with the present second example, since the liquid crystal is arrayed (oriented) in the transverse direction and is rotated transversely during driving, there is no fear of the liquid crystal molecules becoming perpendicular with respect to the substrate, while the liquid crystal molecules can hardly interrupt the light proceeding in an oblique direction, thus providing an advantage that the angle of visibility (visual field angle) is extended as compared to that possible with the first conventional example.